A Half Adder is a basic combinational logic circuit that performs the addition of two binary digits. It has two inputs — A and B — and produces two outputs: Sum (S) and Carry (C).
The rules for binary addition of single bits are:
From the truth table:
Hence:
This is the basic and most common implementation using standard logic gates:
Using only NAND gates, we can derive the same logic:
Similarly, the Half Adder can be built using only NOR gates:
Q1. What are the two outputs of a Half Adder?
Q2. What is the symbolic Boolean expression for the Sum output of a Half Adder?
Q3. What is the Carry output when A = 1 and B = 1?
Q4. The Half Adder circuit cannot:
Q5. Which gate alone can be used to implement a Half Adder?
Q6. What is the Carry expression in SOP form?
Q7. If A = 0 and B = 1, what is the Sum output?
Q8. The gate used for generating the Carry output is:
Q9. Which combination correctly represents a Half Adder using basic gates?
Q10. What is the Sum output when both A and B are 1?